Team DARK Pro DDR4-3000 16GB Review Dual Channel Kit


Packaging and Closer Look

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I am quite impressed with the packaging of the Team DARK Pro DDR4. It came in a nice box as you can see from the photos above. This is the second time around I was able to unbox a DDR4 memory kit with this level of presentation.

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You can take a peek at the DDR4 memory kit inside by flipping the front cover. There’s a small window for you to see what color theme is the kit inside (aside from the circle color at the back). Overall presentation and packaging is really nice, something that you don’t usually experience with DDR4 memory kits nowadays.

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The DARK Pro heat spreader is composed of several layers of aluminum sheet. Both sides have identical design so you don’t have to worry if the stick is facing the wrong direction. However, one side has a sticker containing some details of the memory stick. The information on the sticker includes: the stick’s size, clock speed, timings, voltage, model number and serial number.

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The heat spreader itself is somewhat thick and the whole stick itself is a little bit heavy compared to DDR4 memory with low profile heat spreaders. The top portion where the logo of the TeamGroup is imprinted is removable by unscrewing the two hex screws located on both sides.

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Removing the DARK Pro DDR4’s heat spreader is easy. Simply unscrew the hex screws, remove the top bar and, gently and slowly remove one side of the heat spreader. In my case the adhesive was not that strong and I was able to remove it easily without damaging the prints on the memory chips.

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There are a total of 16 SKhynix H5AN4G8NMFR chips per stick (8 chips on each side), for a total of 8GB per stick. According to SKhynix’s site: “The H5AN4G4NMFR-xxC, H5AN4G8NMFR-xxC and H5AN4G6NMFR-xxC are a 4Gb CMOS Double Data Rate IV (DDR4) Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. SK hynix 4Gb DDR4 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.”

Now, let’s proceed to the next page for the test setup and benchmark results.

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